//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.41A/W32 EVALUATION   09/Dec/2007  21:14:58 /
// Copyright 1999-2005 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  interwork                                           /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  D:\Pasha\elf\googlecode\SieTextView\conf_loader.c   /
//    Command line    =  D:\Pasha\elf\googlecode\SieTextView\conf_loader.c   /
//                       -D NEWSGOLD -D ELKA -lC D:\Pasha\elf\googlecode\Sie /
//                       TextView\Release\List\ -lA                          /
//                       D:\Pasha\elf\googlecode\SieTextView\Release\List\   /
//                       -o D:\Pasha\elf\googlecode\SieTextView\Release\Obj\ /
//                        -s9 --no_unroll --cpu_mode arm --endian little     /
//                       --cpu ARM926EJ-S --stack_align 4 --interwork -e     /
//                       --fpu None -I "D:\Pasha\ARM_Embedded_Workbench\Embe /
//                       dded Workbench 4.0 Evaluation\ARM\INC\"             /
//                       --inline_threshold=2                                /
//    List file       =  D:\Pasha\elf\googlecode\SieTextView\Release\List\co /
//                       nf_loader.s79                                       /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME conf_loader

        RTMODEL "StackAlign4", "USED"
        RTMODEL "__cpu_mode", "__pcs__interwork"
        RTMODEL "__data_model", "absolute"
        RTMODEL "__endian", "little"
        RTMODEL "__rt_version", "6"

        RSEG CONFIG_C:DATA:REORDER:NOROOT(0)
        RSEG CSTACK:DATA:NOROOT(2)

        MULTWEAK ??InitConfig??rT
        MULTWEAK ??LoadConfigData??rT
        PUBLIC InitConfig
        FUNCTION InitConfig,0201H
        LOCFRAME CSTACK, 8, STACK
        PUBLIC LoadConfigData
        FUNCTION LoadConfigData,0203H
        LOCFRAME CSTACK, 36, STACK
        
        CFI Names cfiNames0
        CFI StackFrame CFA R13 HUGEDATA
        CFI Resource R0:32, R1:32, R2:32, R3:32, R4:32, R5:32, R6:32, R7:32
        CFI Resource R8:32, R9:32, R10:32, R11:32, R12:32, CPSR:32, R13:32
        CFI Resource R14:32, SPSR:32
        CFI VirtualResource ?RET:32
        CFI EndNames cfiNames0
        
        CFI Common cfiCommon0 Using cfiNames0
        CFI CodeAlign 2
        CFI DataAlign 4
        CFI ReturnAddress ?RET CODE
        CFI CFA R13+0
        CFI R0 Undefined
        CFI R1 Undefined
        CFI R2 Undefined
        CFI R3 Undefined
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI R7 SameValue
        CFI R8 SameValue
        CFI R9 SameValue
        CFI R10 SameValue
        CFI R11 SameValue
        CFI R12 Undefined
        CFI CPSR SameValue
        CFI R14 Undefined
        CFI SPSR SameValue
        CFI ?RET R14
        CFI EndCommon cfiCommon0
        
        
        CFI Common cfiCommon1 Using cfiNames0
        CFI CodeAlign 4
        CFI DataAlign 4
        CFI ReturnAddress ?RET CODE
        CFI CFA R13+0
        CFI R0 Undefined
        CFI R1 Undefined
        CFI R2 Undefined
        CFI R3 Undefined
        CFI R4 SameValue
        CFI R5 SameValue
        CFI R6 SameValue
        CFI R7 SameValue
        CFI R8 SameValue
        CFI R9 SameValue
        CFI R10 SameValue
        CFI R11 SameValue
        CFI R12 Undefined
        CFI CPSR SameValue
        CFI R14 Undefined
        CFI SPSR SameValue
        CFI ?RET R14
        CFI EndCommon cfiCommon1
        
InitConfig          SYMBOL "InitConfig"
??InitConfig??rT    SYMBOL "??rT", InitConfig
LoadConfigData      SYMBOL "LoadConfigData"
??LoadConfigData??rT SYMBOL "??rT", LoadConfigData

        EXTERN cfghdr0


        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock0 Using cfiCommon0
        CFI NoFunction
        THUMB
??LoadConfigData??rT:
        BX       PC
        Nop      
        CFI EndBlock cfiBlock0
        REQUIRE LoadConfigData
// D:\Pasha\elf\googlecode\SieTextView\conf_loader.c
//    1 #include "..\inc\swilib.h"
//    2 #include "..\inc\cfg_items.h"
//    3 #include "conf_loader.h"
//    4 
//    5 #pragma segment = "CONFIG_C"

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock1 Using cfiCommon1
        CFI Function LoadConfigData
        ARM
//    6 int LoadConfigData(const char *fname) {
LoadConfigData:
        PUSH     {R4-R10,LR}
        CFI ?RET Frame(CFA, -4)
        CFI R10 Frame(CFA, -8)
        CFI R9 Frame(CFA, -12)
        CFI R8 Frame(CFA, -16)
        CFI R7 Frame(CFA, -20)
        CFI R6 Frame(CFA, -24)
        CFI R5 Frame(CFA, -28)
        CFI R4 Frame(CFA, -32)
        CFI CFA R13+32
//    7   int f;
//    8   unsigned int ul;
//    9   char *buf;
//   10   int result = 0;
//   11   void *cfg;
//   12 
//   13   extern const CFG_HDR cfghdr0; //first var in CONFIG
//   14   cfg = (void*) &cfghdr0;
//   15 
//   16   unsigned int len = (int)__segment_end("CONFIG_C")-(int)__segment_begin("CONFIG_C");
        LDR      R6,??LoadConfigData_0  ;; SFE(CONFIG_C) - SFB(CONFIG_C)
        SUB      SP,SP,#+4
        CFI CFA R13+36
        MOV      R4,R0
        MOV      R5,#+0
//   17 
//   18   if (!(buf = malloc(len))) return -1;
        MOV      R0,R6
        SWI      +20
        MOVS     R7,R0
        MVNEQ    R0,R5
        POPEQ    {R1,R4-R10,PC}
//   19   if ((f = fopen(fname, A_ReadOnly + A_BIN, 0, &ul)) != -1) {
        LDR      R9,??LoadConfigData_0+0x4  ;; cfghdr0
        MOV      R3,SP
        MOV      R2,#+0
        MOV      R1,#+32768
        MOV      R0,R4
        SWI      +10
        MOV      R8,R0
        MVN      R10,R5
        CMP      R8,R10
        BEQ      ??LoadConfigData_1
//   20     if (fread(f, buf, len, &ul) == len) {
        MOV      R3,SP
        MOV      R2,R6
        MOV      R1,R7
        SWI      +11
        CMP      R0,R6
        BNE      ??LoadConfigData_2
//   21       memcpy(cfg, buf, len);
        MOV      R2,R6
        MOV      R1,R7
        MOV      R0,R9
        SWI      +286
//   22       fclose(f, &ul);
??LoadConfigData_3:
        MOV      R1,SP
        MOV      R0,R8
        SWI      +13
        B        ??LoadConfigData_4
//   23     }
//   24     else {
//   25       fclose(f, &ul);
??LoadConfigData_2:
        MOV      R1,SP
        MOV      R0,R8
        SWI      +13
//   26       goto L_SAVENEWCFG;
//   27     }
//   28   }
//   29   else {
//   30   L_SAVENEWCFG:
//   31     if ((f = fopen(fname, A_ReadWrite + A_Create + A_Truncate, P_READ + P_WRITE, &ul)) != -1) {
??LoadConfigData_1:
        MOV      R3,SP
        MOV      R2,#+384
        MOV      R1,#+2
        ORR      R1,R1,#0x300
        MOV      R0,R4
        SWI      +10
        MOV      R8,R0
        CMP      R8,R10
        BEQ      ??LoadConfigData_5
//   32       if (fwrite(f, cfg, len, &ul) != len) result = -1;
        MOV      R3,SP
        MOV      R2,R6
        MOV      R1,R9
        SWI      +12
        CMP      R0,R6
        BEQ      ??LoadConfigData_3
        MOV      R5,R10
//   33       fclose(f,&ul);
        B        ??LoadConfigData_3
//   34     }
//   35     else
//   36       result=-1;
??LoadConfigData_5:
        MOV      R5,R10
//   37   }
//   38   mfree(buf);
??LoadConfigData_4:
        MOV      R0,R7
        SWI      +21
//   39   return(result);
        MOV      R0,R5
        POP      {R1,R4-R10,PC}   ;; return
        DATA
??LoadConfigData_0:
        DC32     SFE(CONFIG_C) - SFB(CONFIG_C)
        DC32     cfghdr0
        CFI EndBlock cfiBlock1
//   40 }

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock2 Using cfiCommon0
        CFI NoFunction
        THUMB
??InitConfig??rT:
        BX       PC
        Nop      
        CFI EndBlock cfiBlock2
        REQUIRE InitConfig
//   41 

        RSEG CODE:CODE:NOROOT(2)
        CFI Block cfiBlock3 Using cfiCommon1
        CFI Function InitConfig
        ARM
//   42 void InitConfig()
//   43 {
InitConfig:
        PUSH     {R4,LR}
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
//   44   if (LoadConfigData("4:\\ZBin\\etc\\SieTxtView.bcfg") < 0)
        LDR      R4,??InitConfig_0  ;; `?<Constant "0:\\\\ZBin\\\\etc\\\\SieTxtVie...">`
        ADD      R0,R4,#+28
        BL       LoadConfigData
        CMP      R0,#+0
        POPPL    {R4,PC}
//   45     LoadConfigData("0:\\ZBin\\etc\\SieTxtView.bcfg");
        MOV      R0,R4
        BL       LoadConfigData
//   46 }
        POP      {R4,PC}          ;; return
        DATA
??InitConfig_0:
        DC32     `?<Constant "0:\\\\ZBin\\\\etc\\\\SieTxtVie...">`
        CFI EndBlock cfiBlock3

        RSEG CONFIG_C:DATA:REORDER:NOROOT(0)

        RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "0:\\\\ZBin\\\\etc\\\\SieTxtVie...">`:
        DATA
        DC8 "0:\\ZBin\\etc\\SieTxtView.bcfg"
        DC8 "4:\\ZBin\\etc\\SieTxtView.bcfg"

        END
// 
// 292 bytes in segment CODE
//  56 bytes in segment DATA_C
// 
// 284 bytes of CODE  memory (+ 8 bytes shared)
//  56 bytes of CONST memory
//
//Errors: none
//Warnings: none
